Minimal Instruction Set FPGA AES processor using Handel - C

J H Kong; Li-Minn Ang; K P Seng; A O Adejo

doi:10.1109/ICCAIE.2010.5735100

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Minimal Instruction Set FPGA AES processor using Handel - C

Conference paper

Peer reviewed

Minimal Instruction Set FPGA AES processor using Handel - C

J H Kong, Li-Minn Ang, K P Seng and A O Adejo

2010 International Conference on Computer Applications and Industrial Electronics, ICCAIE 2010, pp.340-344

International Conference on Computer Applications and Industrial Electronics (ICCAIE 2010), 2010 (Kuala Lumpur, Malaysia, 05-Dec-2010–08-Dec-2010)

Institute of Electrical and Electronics Engineers

2010

DOI: https://doi.org/10.1109/ICCAIE.2010.5735100

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Abstract

minimal instruction set computer

AES

This paper presents an FPGA implementation of the Advanced Encryption Standard (AES), using a Minimal Instruction Set Computer (MISC) architecture. The MISC's architecture is simple and reconfigurable to execute fundamental instructions with just simple hardware logic components. Due to the MISC's simplicity, it can be further extended to data encryption systems for certain applications like wireless sensor networks and other low complexity systems which may have severely constrained physical memory requirements. With the availability of the FPGA technology, aids practical implementation of the data encryption purpose processor.

Details

Title: Minimal Instruction Set FPGA AES processor using Handel - C
Authors: J H Kong (Author) - University of Nottingham Malaysia Campus
Li-Minn Ang (Author) - University of Nottingham Malaysia Campus
K P Seng (Author) - University of Nottingham Malaysia Campus
A O Adejo (Author) - University of Nottingham Malaysia Campus
Publication details: 2010 International Conference on Computer Applications and Industrial Electronics, ICCAIE 2010, pp.340-344
Conference details: International Conference on Computer Applications and Industrial Electronics (ICCAIE 2010), 2010 (Kuala Lumpur, Malaysia, 05-Dec-2010–08-Dec-2010)
Publisher: Institute of Electrical and Electronics Engineers
Date published: 2010
DOI: 10.1109/ICCAIE.2010.5735100
ISBN: 9781424490554
Copyright note: © 2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Organisation Unit: University of the Sunshine Coast, Queensland; School of Science, Technology and Engineering; Engage Research Lab
Language: English
Record Identifier: 99513901702621
Output Type: Conference paper

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