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Berger check prediction for concurrent error detection in the Braun array multiplier
Conference paper   Peer reviewed

Berger check prediction for concurrent error detection in the Braun array multiplier

Christian M Jones, S S Dlay and R G Naguib
Proceedings of the 3rd IEEE International Conference on Electronics, Circuits, and Systems, pp.81-84
IEEE International Conference on Electronics, Circuits, and Systems, 3rd (Rhodes, Greece, 13-Oct-1996–16-Oct-1996)
IEEE (Institute of Electrical and Electronics Engineers)
1996
url
https://doi.org/10.1109/ICECS.1996.582691View
Published Version

Abstract

Computer Software Berger Check Symbol Prediction fault diagnosis Braun array multiplier
We develop the Berger Check Symbol Prediction and report the performance benefit for the realisation of practical concurrent error detection systems. Furthermore, we show that the Berger coded Braun array multiplier can not only achieve the objective for detecting unidirectional faults but analysis has indicated an inherent ability of this prediction technique for error detection beyond the scope for which it was originally intended. In fact the coding provides error detectability for single and multiple stuck at faults. Further study suggests the performance of the Berger check prediction Braun array multiplier tends towards 100% error detectability for increasing input bit length and array dimensions. The Berger check predictive Braun array multiplier has introduced a high level of concurrent error detectability with only a minimal extension in the hardware implementation.

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