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Interactively verifying a simple real-time scheduler
Book chapter   Peer reviewed

Interactively verifying a simple real-time scheduler

Colin Fidge, Peter Kearney and Mark Utting
Computer Aided Verification: 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, pp.395-408
International Computer Aided Verification, 7th (Liege, Belgium, 03-Jul-1995–05-Jul-1995)
Lecture Notes in Computer Science (LNCS), 939, Springer Berlin Heidelberg
1995
url
https://doi.org/10.1007/3-540-60045-0_65View
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Abstract

Computer Software computer software verification
This paper describes the interactive verification of a simple interrupt-driven real-time scheduler written in the machine code language of the MIPS R3000 RISC processor. The formal verification was carried out using the interactive theorem prover Ergo.

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